1. Technical Field
The present invention relates to a semiconductor package, and more particularly, to a high input/output (I/O) semiconductor chip package including a memory chip and a processor chip that are connected to each other via through electrodes arranged on a scribe region, and a method of manufacturing the high I/O semiconductor chip package.
2. Description of the Related Art
A high performance processor such as a CPU or an MPU requires a memory device to/from which a large amount of data can be written/read at high speed; for example, a cache memory device. In a conventional memory device such as a DRAM, data is read from or written to the memory device by passing through wires on a system board. In this case, the ratio of the data writing/reading time to the data processing time is gradually increased, thereby decreasing the processing time of the whole system/processor. In addition, a large system space is required for a memory device and a processor, and design rules and the length of wires are increased. The increase in the length of wires causes increase in the power consumption of input/output power in order to maintain data integrity. In particular, in the case of using a CPU as a processor, data needs to pass through a controller, and thus the above problems are exacerbated. The present invention addresses these and other disadvantages of the conventional art.